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Engineer I - Software (FPGA Place and Route)

Microchip Technology Inc
United States, California, San Jose
3850 North First Street (Show on map)
Oct 16, 2025

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

Microchip Technology Inc. has a Software Engineer, FPGA Place and Route opening based in San Jose, California. The successful candidate will be responsible for developing new placement and routing algorithms. In this role, you will be working within the Physical Design team of other software engineers delivering high-performance place and route software.

Our placement and routing tools are distributed commercially to a wide range of customers and are used internally for the exploration of new FPGA architectures. We research and implement sophisticated approaches for solving gigantic problems - like finding high-quality placements for millions of movable modules, or routing circuits whose graph representations contain hundreds of millions of edges. To do this, we draw from a variety of computer science domains including Machine learning, Graph Neural Network, Numerical optimization, Linear programming, Boolean satisfiability, Hyper-graph Partitioning, Stochastic search, Graph theory, and Traffic routing.

You will work closely with other FPGA Software Engineering teams to help deliver a comprehensive software suite for designing Microchip's FPGAs and managing the entire design flow from entry, to synthesis, through place-and-route, timing, power analysis, and simulation.

Responsibilities:

  • Develop state-of-the-art FPGA CAD algorithms to improve circuit performance, power, and tool runtime.
  • Execute methodical, scientific experiments to validate the extent of algorithmic improvements.
  • Analyze and share your data with various groups within the company.
  • Perform design reviews, unit testing, and code reviews.
  • Own and maintain code modules.
  • Study literature in the CAD industry and contribute to research discussions.

Requirements/Qualifications:

Job Requirements:

  • BS, MS or PhD in CS/EE or related field.
  • 0-2 years of relevant research or work experience in programmable architecture, applications implementation, or Software Engineering.
  • Strong knowledge and ability in C++, as well as a deep understanding of algorithms and data structures.
  • Comfortable with software development in a Linux environment.
  • Outstanding oral and written communication skills, willingness to document work products.

Preferred Qualifications:

  • Exposure to Placement, Routing, Synthesis, Static Timing Analysis (STA) for FPGA or ASIC.
  • Familiarity with PyTorch, Graph Neural Network, CUDA, Machine learning, linear and non-linear optimization.
  • Exposure to parallel programming techniques, like TBB.
  • Experience with source code management systems (Git).
  • Experience with shell scripting languages (Python, TCL, Bash, Perl).

Travel Time:

0% - 25%

Physical Attributes:

Feeling, Hearing, Other, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements:

70% sitting, 15% standing and 15% walking, 100% indoors; Usual business hours

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:

Benefits of working at Microchip

The annual base salary range for this position, which could be performed in California, is $68,640 - $128,000.*

*Range is dependent on numerous factors including job location, skills and experience.

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

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