Manager, FPGA IP Design Engineering

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE

We are seeking a technically strong, executiondriven engineering manager to lead endtoend development of FPGAbased IP-from concept through postsilicon validation. This role will guide a highperforming team of specialists to deliver optimized, customerready IP solutions such as LPDDR5/6, DDR5/6, MIPI, Display port and HDMI.

THE IDEAL CANDIDATE

You are a collaborative, detailoriented leader who thrives in fastpaced, crossfunctional environments. You bring strong communication, problemsolving ability, and an ownership mindset to drive complex product development. You possess deep technical expertise in FPGAbased IP flows, RTL development, and validation methodologies, along with the leadership skills needed to motivate and guide teams across global sites.

KEY RESPONSIBILITIES

Product Inception & Definition

• Define product requirements using input from engineering and marketing.
• Drive earlyphase cost modeling, resource planning, and schedule estimates.
• Align product roadmap and schedules with external partners and vendors.

Development & Execution

• Collaborate with architecture and verification teams to balance timing, performance, and schedule tradeoffs.
• Support engineering execution from RTL development through FPGA timing closure.
• Lead crossfunctional alignment and resolve issues across the development lifecycle.
• Provide technical direction on IP selection, protocols, and SystemVerilogbased design decisions.

PostSilicon & Validation

• Ensure comprehensive test plans and validation strategies are completed before silicon bringup.
• Oversee characterization, validation, and silicon debug activities.
• Integrate feedback from marketing and technical marketing to ensure producttocustomer alignment.
• Identify validation gaps and drive crossteam closure.

EndtoEnd Product Readiness

• Own the full solution lifecycle-from product definition to validated, customerdeployable silicon.
• Ensure deliverables meet cost, performance, and timetomarket goals.
• Coordinate with hardware, software, and customerfacing teams to enable complete solution readiness.

PREFERRED EXPERIENCE

• Proven success delivering hardware products from concept to postsilicon validation.
• Strong background in FPGA, IP, or ASIC design and verification flows.
• Experience with DDR, memory controllers, MIPI, or HDMI.
• Knowledge of memory technologies (DDR5/DDR4, LPDDR5/LPDDR6) and JEDEC standards.
• Handson experience with SystemVerilog, digital design methodologies, and protocol integration.
• Familiarity with FPGA IP development flows and verification.
• Strong understanding of customer requirements, systemlevel tradeoffs, and solution architecture.
• Demonstrated ability to excel in dynamic, crossdisciplinary environments.
• Scripting and automation proficiency to enhance design and validation workflows.
• Experience working effectively across global teams.

ACADEMIC QUALIFICATIONS

• Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.

LOCATION:

• San Jose, CA

Role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.